A voltage reference circuit with low temperature coefficient is an essential part for analog IC. The circuit generates low temperature coefficient voltage by weighted summing of positive and negative temperature coefficient voltages to reduce variation of the reference voltage with temperature. The conventional voltage reference is generated by weighted summing of difference in PN junction voltages of bipolar transistors with positive and negative temperature coefficients, as shown in FIG. 1 (the temperature coefficient of resistor is neglected), and operational amplifier AO enables voltages at g0 and f0) to be equal, as ICQ10R30=ICQ20R20, then:
                              V          REF                =                              V                          BE                              Q                ⁢                                                                  ⁢                10                                              +                      Δ            ⁢                                                  ⁢                                          V                                  BE                                                            Q                      ⁢                                                                                          ⁢                      10                                        ,                                          Q                      ⁢                                                                                          ⁢                      20                                                                                  ·                                                R                  20                                                  R                  10                                                                                        (        1        )            
Where VBE is PN junction voltage of bipolar transistor Q10, and ΔVBEQ10,Q20 is the PN junction voltage difference between Q10 and Q20.
                              V          BE                =                                            V              T                        ⁢            ln            ⁢                                                  ⁢                          (                                                I                  C                                                  I                  S                                            )                                =                                    kT              q                        ⁢                          ln              (                                                I                  C                                                  b                  ·                                      T                    2.5                                    ·                                      ⅇ                                                                  -                                                  E                          g                                                                    kT                                                                                  )                                                          (        2        )            
Where k is Boltzmann constant, T is absolute temperature, q is the quantity of electron, IC is the collector current of bipolar transistor, b is a proportional coefficient and Eg is Si bandgap energy.
From Equation (2), the following could be derived:
                              Δ          ⁢                                          ⁢                      V                          BE                                                Q                  ⁢                                                                          ⁢                  10                                ,                                  Q                  ⁢                                                                          ⁢                  20                                                                    =                                                            V                T                            ⁢                              ln                ⁡                                  (                                                            I                                              C                                                  Q                          ⁢                                                                                                          ⁢                          10                                                                                                            I                      S                                                        )                                                      -                                          V                T                            ⁢                              ln                ⁡                                  (                                                            I                                              C                                                  Q                          ⁢                                                                                                          ⁢                          20                                                                                                                                    n                        0                                            ⁢                                              I                        S                                                                              )                                                              =                                                    V                T                            ⁢                              ln                ⁡                                  (                                                            n                      0                                        ⁢                                                                  I                                                  C                                                      Q                            ⁢                                                                                                                  ⁢                            10                                                                                                                      I                                                  C                                                      Q                            ⁢                                                                                                                  ⁢                            20                                                                                                                                )                                                      =                                                            k                  ⁢                                                                          ⁢                                      ln                    ⁡                                          (                                                                        n                          0                                                ⁢                                                                              R                            20                                                                                R                            30                                                                                              )                                                                      q                            ·              T                                                          (        3        )            
Where k is Boltzmann constant, T is absolute temperature, q is the quantity of electron, n0 is the ratio of the number of bipolar transistor Q20 to Q10.
From Equation (2) & (3), the following could be derived:
                                          V                          BE                              Q                ⁢                                                                  ⁢                10                                              =                                                    E                g                            q                        +                                          kT                q                            ⁢                              ln                ⁡                                  (                                      I                                          C                                              Q                        ⁢                                                                                                  ⁢                        10                                                                              )                                                      -                                                            2.5                  ⁢                  k                                q                            ⁢              T              ⁢                                                          ⁢                              ln                ⁡                                  (                  T                  )                                                      -                                                            k                  ⁢                                                                          ⁢                                      ln                    ⁡                                          (                      b                      )                                                                      q                            ⁢              T                                      ⁢                                  ⁢        Where                            (        4        )                                                      I                          C                              Q                ⁢                                                                  ⁢                10                                              =                                                                      I                                      C                                          Q                      ⁢                                                                                          ⁢                      20                                                                      ⁢                                  R                  20                                                            R                30                                      =                                                                                Δ                    ⁢                                                                                  ⁢                                          V                                              BE                                                                              Q                            ⁢                                                                                                                  ⁢                            10                                                    ,                                                      Q                            ⁢                                                                                                                  ⁢                            20                                                                                                                                                    R                    10                                                  ·                                                      R                    20                                                        R                    30                                                              =                                                                                          kR                      20                                        ⁢                                          ln                      ⁡                                              (                                                                              n                            0                                                    ⁢                                                                                    R                              20                                                                                      R                              30                                                                                                      )                                                                                                                        qR                      10                                        ⁢                                          R                      30                                                                      ·                T                                                    ⁢                                  ⁢                  Then          ,                                    (        5        )                                          V                      BE                          Q              ⁢                                                          ⁢              10                                      =                                            E              g                        q                    +                                                    k                ⁢                                                                  ⁢                                  ln                  (                                                                                    kR                        20                                            ⁢                                              ln                        ⁡                                                  (                                                                                    n                              0                                                        ⁢                                                                                          R                                20                                                                                            R                                30                                                                                                              )                                                                                                                                    qbR                        10                                            ⁢                                              R                        30                                                                              )                                            q                        ·            T                    -                                                                      1.5                  ⁢                  k                                q                            ·              T                        ⁢                                                  ⁢                          ln              ⁡                              (                T                )                                                                        (        6        )            
From Equations (1),(3) and (6):
                              V          REF                =                                            E              g                        q                    +                                                    k                ⁢                                                                  ⁢                                  ln                  (                                                                                                                                          kR                            20                                                    ⁡                                                      (                                                                                          n                                0                                                            ⁢                                                                                                R                                  20                                                                                                  R                                  30                                                                                                                      )                                                                                                                                R                            20                                                                                R                            10                                                                                              ⁢                                              ln                        ⁡                                                  (                                                                                    n                              0                                                        ⁢                                                                                          R                                20                                                                                            R                                30                                                                                                              )                                                                                                                                    qbR                        10                                            ⁢                                              R                        30                                                                              )                                            q                        ·            T                    -                                                                      1.5                  ⁢                  k                                q                            ·              T                        ⁢                                                  ⁢                          ln              ⁡                              (                T                )                                                                        (        7        )            
It can be seen from Equations (3) and (6), ΔVBEQ10,Q20 is related to T, and VBEQ10 is not only relevant to T, but also to T ln(T). Therefore, when ΔVBEQ10,Q20 is added to VBEQ10, only T-related item can be used to compensate for T ln(T)-related item, as shown in Equation (7). For conventional voltage reference circuits, the reference voltage VREF is always associated to T and T ln(T), which means that the temperature coefficient of the reference voltage can never be fully eliminated. Temperature coefficient of the conventional voltage reference source using standard process technology is 40 ppm/° C., namely, in the temperature range from −40° C. to 85° C., variation of the reference voltage can be calculated from:40 ppm/° C.×[85° C.−(−40° C.)]×100%=0.5% .
Therefore, a voltage reference circuit with zero-temperature coefficient based on temperature compensation is required to eliminate effects of T and T ln(T) and solve the problem of inability of temperature coefficient elimination due to the dependence of output reference voltage from the conventional voltage reference source on T and T ln(T).
Contents of Invention
The object of the present invention is to eliminate effects of T and T ln(T) and generate reference voltage with zero-temperature coefficient based on temperature compensation, so as to solve the problem of inability of temperature coefficient elimination due to the dependence of output reference voltage from the conventional voltage reference source on T and T ln(T).
The present invention accomplishes the object in the following way:
The present invention presents a voltage reference circuit based on temperature compensation, which comprises a positive temperature coefficient generating unit, a negative temperature coefficient generating unit, temperature compensaion circuit, mirror circuit and voltage divider circuit;
The positive temperature coefficient generating unit generates a positive temperature coefficient voltage with Item T ln (T), and outputs a positive temperature coefficient current with both Items T and T In (T);
The negative temperature coefficient generating unit generates positive temperature coefficient voltage with both Items T and T ln (T), and outputs positive temperature coefficient current with Item T;
The temperature compensation circuit converts the positive temperature coefficient current with both Items T and T ln (T) into positive temperature coefficient voltage with both Items T and T ln (T), and compensates the negative temperature coefficient voltage with both Items T and T ln (T) from negative temperature coefficient generating unit. The negative temperature coefficient generating unit, together with temperature compensation circuit, generates reference voltage with zero temperature coefficient;
Where T is absolute temperature;
The mirror circuit multiplies output current from the negative temperature coefficient generating unit by a factor of m, which is then input to the positive temperature coefficient generating unit;
The voltage divider adjusts output voltage and defines operating voltage of both positive and negative temperature coefficient generating units.
Furthermore, the temperature compensation circuit comprises resistor R5, the positive temperature coefficient generating unit comprises operational amplifier A1, bipolar transistors Q3 and Q4, resistors R6 and R4, where the positive input of A1 is connected to the base of Q4, while the negative input of A1 is connected to the collector of Q4, and the output of A1 is connected to the emitter of Q4, one end of R6 is connected to the negative input of A1 and the collector of Q4, and the other end of R6 is grounded, between emitters of both Q4 and Q3 is R4, the collector of Q3 is connected to mirror circuit, and the base of Q3 is connected to the base of Q4;
Furthermore, the negative temperature coefficient generating unit comprises operational amplifier A2, bipolar transistors Q1 and Q2, and resistors R1, R2 and R3, where the emitter of Q1 is connected to the positive input of A2, which is connected to R3, the emitter of Q2 is connected via R1 with the negative input of A2, which is connected to R2, the output of A2 is connected to resistor R5, of which the other end is connected with R2 and R3, the other end of R2 is connected to the emitter of Q3, collectors of both Q1 and Q2 are connected with mirror circuit, and the output of A2 is connected to voltage divider;
Furthermore, the mirror circuit comprises the first NMOS transistor M1 and the second NMOS transistor M2, of which the sources are grounded, the gates of both M1 and M2 are connected together, the gate of M2 is connected to its drain, the drain of Ml is connected to the collector of Q3, and the gate of M2 is connected to collectors of both Q1 and Q2;
Furthermore, the voltage divider comprises resistors R7 and R8, where R8 is connected with the output of operational amplifier A2, while the other end of R8 is connected with R7 and bases of Q1, Q2, Q3 and Q4, the other end of R7 is connected to the sources of M1 and M2, and the connection nodes of operational amplifier A2 with R5 and R8 are the output ports, Vo, of the voltage reference circuit;
Furthermore, the output reference voltage value is determined by the ratio of R7 to R8: Vo=(Eg/q)·(1+R7/R8) where (Eg/q) is Si bandgap voltage. Different output reference voltages can be obtained by adjusting the ratio of R7 to R8.
Furthermore, R4 and R5 has the following relation:
                    R        5                    R        4              =          3      2        ;
Furthermore, the negative temperature coefficient generating unit comprises at least one bipolar transistor Q1 and at least one bipolar transistor Q2, and the ratio of the number of Q2 to Q1 is n. The positive temperature coefficient generating unit comprises at least one bipolar transistor Q3 and at least one bipolar transistor Q4, and the ratio of the number of Q4 to Q3 is p. The mirror circuit comprises at least one first NMOS transistor M1 and one second NMOS transistor M2, where n>1 and p>1.
Compared with the conventional voltage reference source, the voltage reference circuit based on temperature compensation in this invention features:
1 . The conventional voltage reference uses Item T to compensate Item T ln(T), while the present invention uses Item T to compensate Items T, and T ln (T) to compensate T ln (T), which makes the compensation more specific.
2 . In the conventional voltage reference circuit, Item T ln(T) is compensated by Item T, so the output reference voltage is ralated to both T and T ln(T), which makes it impossible to completely eliminate temperature coefficient (about 40 ppm/° C.). The present invention outputs a reference voltage independent to T and T ln(T), so, it is capable of delivering a reference voltage with zero-temperature coefficient.
3 . The output voltage range of the conventional voltage reference circuit is the bandgap voltage of silicon, therefore, the output voltage is a fixed value. The present invenion offers a voltage reference Vo=(Eg/q)·(1+R7/R8), which is defined flexibly by adjusting the ratio of resistor R7 to R8, so the circuit is capable of delivering any output voltage value within a certain range.
To sum up, the present invention has the advantages of well-targeted compensation, zero-temperature coefficient and adjustable output voltage values.
Other advantages, objects and features of the present invention will be elaborated in the subsequent embodiments, and may be best understood by referring to the following description of the presently preferred embodiments, together with the accompanying drawings.